An Introduction to Armv8-M architecture in Cortex-M23 and Cortex-M33
The embedded industry is rapidly evolving, and with it, the need for powerful, secure, and efficient microcontrollers. Enter Armv8-M architecture—the latest leap forward in the Cortex-M family.
Throughout a three-part blog series, we’ll explore the new features and improvements introduced in Cortex-M23 and Cortex-M33 microcontrollers, designed to address modern challenges in embedded systems.
Here’s what we’ll cover:
Part 1: We’ll kick things off by exploring the new C11 language support and significant MPU (Memory Protection Unit) updates. These enhancements are critical for ensuring data integrity and memory security, key components of any robust embedded system.
Part 2: Next, we’ll shift gears and focus on performance improvements in Cortex-M0/M0+, such as adding hardware division, long branch instructions, and more efficient MOV operations. These updates give developers a performance edge while maintaining low power consumption.
Part 3: Finally, we’ll wrap up by taking a closer look at security improvements. With embedded devices increasingly connected to networks, TrustZone technology and stack protection have become essential for safeguarding systems from threats. We’ll explore how these features enhance security.
Whether you’re designing for industrial automation, IoT, or safety-critical applications, this series will give you valuable insights into how Armv8-M shapes the future of embedded systems. Stay tuned as we explore each of these topics in detail!
Blog 1: An Introduction to Armv8-M architecture in Cortex-M23 and Cortex-M33
Support for the C11 language standard and MPU updates
The Cortex-M microcontroller has become a key force in the embedded industry, and for good reason. Over the past decade, it has transformed the landscape of low-power devices and embedded systems. Let’s look closer at why Cortex-M has become so popular and explore the new improvements in Armv8-M architecture—specifically in Cortex-M23 and Cortex-M33 cores.
Why Cortex-M Stands Out
1. Low power consumption: The original Arm CPUs were designed for devices where power efficiency was critical—think cell phones, portable gaming consoles like the Game Boy Advance, and more. These power-conscious designs have penetrated the Cortex-M line, making it perfect for modern embedded systems.
2. Wide product range: The Cortex-M family includes models like Cortex-M0+, Cortex-M3, Cortex-M4, and Cortex-M7, each offering different performance levels, from tens to hundreds of MHz. Today, we even see multi-core options that push performance further.
3. A standardized and licensable microcontroller core: One key advantage of Arm CPUs is their adoption across various semiconductor vendors. This makes it easier for developers to switch between microcontrollers without rebuilding everything from scratch. The unified architecture also standardizes elements like interrupt controllers and timers, allowing software reuse across different projects.
In short, Cortex-M has become a versatile, reliable, and widely adopted microcontroller family for embedded systems.
Armv8-M: The next evolution
As the embedded world advances, so does the Cortex-M family. Enter Armv8-M—the latest architecture for the Cortex-M series. The Cortex-M23 (replacing Cortex-M0/M0+) and the Cortex-M33 (replacing Cortex-M3/M4) inherit the strengths of their predecessors but also introduce new, powerful features.
CPU Core Architecture
Cortex-M0 Armv6-M
Cortex-M0+ Armv6-M
Cortex-M3 Armv7-M
Cortex-M4 ARMv7E-M
Cortex-M7 ARMv7E-M
Cortex-M23 Armv8-M Baseline
Cortex-M33 Armv8-M Mainline
Key updates in Armv8-M
In this blog, we’ll focus on the support for the C11 Language Standard and MPU updates.
- Support for C11: With C11, the latest version of the C programming language, new features like multi-threading and the _Atomic type modifier are added to help manage exclusivity control. This ensures that memory access is handled in a secure and orderly fashion. To support these C11 features, Armv8-M introduces Load acquire and store release instructions, providing more robust memory handling capabilities for embedded systems.
- MPU Updates: The Memory Protection Unit (MPU) in Armv8-M is another significant upgrade. In previous Cortex-M versions, the MPU’s flexibility was limited, but with Armv8-M, developers now have greater control over memory attributes like read/write permissions and cache settings. Additionally, TrustZone support allows for two MPU configurations, Secure and Non-Secure, which further enhances security for modern embedded systems.
A closer look at C11 support
With the introduction of the C11 standard in Armv8-M, new features aimed at improving multi-threading and atomic operations have been incorporated, making it easier to manage exclusive memory access and synchronize processes. One of the key features of C11 is the _Atomic type modifier, which ensures that variables are handled safely in concurrent environments.
In the Armv8-M architecture (such as in the Cortex-M23 and Cortex-M33 cores), hardware instructions like Load Acquire (LDA) and Store Release (STL) have been introduced to support these atomic operations. These instructions ensure that memory operations happen in the correct order, preventing race conditions and ensuring the integrity of the data.
The figure below illustrates how LDA and STL protect critical code sections during memory operations. These instructions guarantee that previous memory accesses are completed before subsequent ones begin, ensuring the system operates as intended without conflicts in data access.
Moreover, Armv8-M introduces exclusive load and store operations, represented by LDAEX and STLEX, which are pivotal in handling atomic operations. These instructions prevent simultaneous writes to the same memory address by multiple threads, ensuring data consistency.
In comparison, Armv7-M (used in cores like Cortex-M3) relies on LDREX and STREX instructions and Data Memory Barrier (DMB) instructions to achieve similar functionality. However, Armv8-M has simplified and improved this process, as shown in the following illustration:
In the example code, we see how _Atomic int ai is incremented using LDAEX and STLEX in Armv8-M, compared to the older LDREX and STREX in Armv7-M. This shows a clear evolution in handling atomic operations, making Armv8-M more efficient and secure for embedded systems requiring reliable data access.
MPU updates in Armv8-M
The Memory Protection Unit (MPU) in Armv8-M also brings significant changes, providing developers greater control over memory access and security. Unlike previous architectures, the Armv8-M MPU allows more flexible region definitions and permissions, offering enhanced memory management across Secure and Non-Secure states.
One essential improvement is the ability to configure Secure and Non-Secure MPUs separately. This ensures that critical data in the Secure world is protected from unauthorized access in the Non-Secure world. Additionally, new memory attributes like Gathering (G), Reordering (R), and Early Write Acknowledgement (E) offer more precise control over how data is handled in the system.
Previous versions, such as Armv7-M, allowed for memory regions but lacked the advanced flexibility and security features now available in Armv8-M. Developers can now define memory regions that optimize performance and security, making it easier to manage complex embedded systems.
These MPU updates, combined with TrustZone technology, make Armv8-M a robust choice for embedded applications where security and performance are critical.
Summary
As embedded systems become more complex, the need for powerful, flexible architectures like Armv8-M grows. With C11 support and MPU updates, the Cortex-M23 and Cortex-M33 are well-positioned to handle the demands of modern embedded applications, from IoT to industrial automation. The IAR Embedded Workbench for Arm supports the entire Cortex-M family, offering a unified development environment that makes transitioning to Armv8-M easy.
In the next part of this series, we’ll dive into performance improvements for Cortex-M0/M0+ and explore how hardware division, new instructions, and more push the limits of embedded system performance.
Take the next step
Ready to see these capabilities in action? Explore Armv8-M with IAR Embedded Workbench. Get hands-on experience and find out how Armv8-M features can enhance your embedded projects. Download the evaluation version of IAR Embedded Workbench for Arm and test its support for the Cortex-M23 and Cortex-M33 cores.
References:
[1] Arm Cortex-M for Beginners: An overview of the Arm Cortex-M processor family and comparison
[2] Armv8-M Memory Model and Memory Protection Version 1.1 User Guide